Technical (Online) Session on Seamless RF Design using Cadence AWR

The Session will cover the following topics:

• RF Basics
• RF Applications
• RF designs using AWR

Technical (Online) Session on Hardware Emulation & Chip Validation by Siemens EDA

The Session will cover the following topics:

• Introduction to hardware emulation
• Importance of hardware emulation in modern chip design
• Exploration of use models and real-world applications on emulation platforms
• Discussion and Q & A session

Technical (Online) Session: An Introduction to Physical Design Implementation by Siemens EDA

The Session will cover the following topics:

• Describe end-to-end Physical Design flow
• Identify standard inputs and outputs for Physical Design
• Explain the processes of Placement, Clock Tree Synthesis (CTS), and Routing using Aprisa
• Understand PPA (Power, Performance, Area) constraints and Signoff procedures

Online Session on IC Packaging & Fab Capabilities by RRP Electronics Limited

The Session will cover the following topics:

• Introduction & Overview of RRP Electronics Ltd
• Pilot Production Facility and Design Capabilities
• Advanced Packaging Technologies (2.5D/3D integration), FOIP (Fan-Out Interposer Package), BGA packaging
• Prototype Fab Capabilities
• Discussion and Q & A session

Technical (Online) Session on Advanced DFT Features Using Cadence EDA Tools by Entuple Team - Day 1

The Session details will cover the following topics:

Session 1:

• Overview of DFT and advanced features in Cadence EDA tools
• Boundary Scan & Programmable Memory Built-In Self-Test (PMBIST)
• Demo: Setting up and running PMBIST

Session 2:

• Scan Compression techniques for reducing test data volume and test time
• Key configuration and flow setup
• Demo: Setting up and running Scan Compression

Technical (Online) Session on Advanced DFT Features Using Cadence EDA Tools by Entuple Team - Day 2

The Session details will cover the following topics:

Session 3:

• On-Product Clock Generation (OPCG) for at-speed test
• Defining and inserting the OPCG Macro
• Demo: Setting up and running OPCG

Session 4:

• Logic Built-In Self-Test (LBIST): Pattern generation for self-test
• Design considerations and flow
• Demo: Setting up and running LBIST